2014 Reports

MAT5A - 0.3mm Pitch WLCSP: Factors Affecting Assembly Yield and Reliability

Author: Michael Meilunas, Jeff Schake

Abstract: This report documents the PCB designs, assembly processes and reliability testing results for three 0.3mm pitch Wafer Level Chip Scale Packages (WLCSP) evaluated by the Advanced Process Lab. The project was undertaken at the request of an AREA member who provided the components with the intention of using similar packaging in production. To maintain realistic design and production scenarios, the participating member set a specific range of requirements that the APL followed during the experiment.

The project was divided into three primary phases: paste printing analysis, assembly analysis, and accelerated reliability analysis (drop test and thermal cycling). Each phase involved investigating multiple factors, many of which were deemed unacceptable for high-yield production and/or long-term reliability results. For brevity, this paper will not address all the parameters that produced undesirable results, but instead will focus on the factors which were found to be most promising.

MAT1A - Underfilling Project

a) Underfilling with the Loctite 1216M

b) Underfilling with the NAMICS SUF1570-2

c) Underfilling with the ZYMET C2852C

d) Underfilling with the Hysol UF3810

e) Observing, Recording and Analyzing Underfill Flow

Author: Pericles Kondos

Abstract: Four different underfills from various suppliers were used to underfill many different types of components on two sections of TB2013 test boards. The back of the side coupon of TB2013 was used for process development and flow studies while the front of the main part of the board was built to be used for ATC tests although flow time information was extracted from it as well. The process parameters for efficient dispensing were determined and the flow time required before the final close-up pass for each component was measured. Some component-specific issues were identified and discussed. Finally, the effect of substrate temperature on flow times and the ability of the material to self-fillet were investigated. The reliability results will be presented in a separate report.

MAT6A - Effect of Sn Surface Finish on 92.5Pb-5Sn-2.5Ag

Author: Harry Schoeller

Abstract: This work investigates the effect of Sn termination finish on the melting temperature, microstructure, and mechanical behavior of 92.5Pb-5Sn-2.5Ag (Alloy 151), a common high melting point (HMP) alloy. 92.5Pb-5Sn-2.5Ag was doped with up to 7% Sn to simulate the final composition of a joint after reflow on a matte-Sn terminated component. Differential Scanning Calorimetry (DSC) was used to measure the change in matrix liquidus temperature with increasing Sn concentration. Microstructure characterization and mechanical tests were carried out on 20 mil solder spheres reflowed on high temperature polyimide test coupons. The precipitate area fraction was quantified for each composition using image analysis software. Joints were shear and fatigue tested at room temperature (RT) in the as-reflow state and at 200˚C (HT) after aging for 1024hrs at 200°C to simulate a high ambient temperature/downhole environment. The failed interfaces were examined to determine the mode of failure. Beyond providing guidance for surface finish selection, this work examines the microstructure and mechanical behavior of 92.5Pb-5Sn-2.5Ag as a function of Sn concentration and temperature. An understanding of the microstructure-mechanical performance relationship will aid in the development of new alloys for high temperature applications.

MAT7A- Drop Performance of LGA and BGA - I

Author: Gaurang Joshi, Babak Arfaei

Abstract: Drop test performance of various alloys in the form of LGA and BGA was evaluated. Test assemblies were assembled with three different solder alloys: SAC105, eutectic tin-lead and Innolot alloys in two different configurations: LGA and BGA. A new test board was designed to isolate failures at the corner joints by electrically event detection in mechanical testing. Boards were drop tested at 500G and their characteristic life was compared. Strain characterization work was also done on assemblies to understand the variation in strain on drop impact. Failure analysis was performed to identify the failure mechanisms. SAC105 LGA showed the best drop performance relative to SnPb and Innolot alloys.

MAT1A - Underfill Project - Underfill Process Optimization and Material Evaluation

Authors: Mohammad Quran, Pericles Kondos, and Peter Borgesen

Abstract: This study evaluated four underfill materials using a flow model that was developed at the Advanced Process Lab (APL). Moreover, it investigated different factors that affect this flow: substrate temperature, standoff, and material age. In addition, the underfill materials’ tendency to form voids during flow or curing was observed, since it has a big effect on the reliability of the assemblies. It was confirmed that flow speed of underfill increases as substrate temperature and standoff increase to a certain limit, while flow and shrinkage voids might evolve in some materials under high dispensing temperatures and due to materials incompatibilities. .

REL11A- Solder Collapse Due To TIM Compression Loads

Author: Nicholas Graziano and Harry Schoeller

Abstract: Compressive loads are often applied to thermal interface materials (TIMs) to improve their thermal performance. This stress must be resolved by the underlying solder joints. The effect of compressive loads on BGA reliability was analyzed for SAC305 in high temperature storage (1000 hours at 125°C). Analysis considers solder collapse for both first and second level joints at various levels of compression. The microstructural evolution of the solder was documented as a function of time, temperature, and pressure. Solder joint collapse for SAC305 was compared to collapse in SnPb solder joints published in literature.

REL3A Vibration Reliability Test Methodology

Author: Aaron J. Stewart and Quang T. Su

Abstract: A test method is developed using a vibration control system and a resistance logger to study sources of error in reliability results and attempt to eliminate them. The test method uses sinusoidal vibration with resonance tracking to account for mechanical changes in the system during test. The vibration controller continuously monitors and adjusts the excitation frequency to match the resonant frequency of the system. Sine sweeps are used to characterize the system before and after the resonant sine dwell tests. Four-terminal resistance sensing is used to monitor solder joints and to indicate joint failure. Cross-sectioning is conducted in order to determine the mode of failure. Tests were conducted on identical PCBs with four variations of interconnect type: tin-lead or lead-free solder; ball grid array or land grid array. The results showed the typical failure mode to be solder fatigue and that tin-lead solder joints out-performed lead-free solder joints. A shift in mechanical properties of the assembly during vibration testing is found to be due to the changes in the printed circuit board rather than the component. It was further shown that a method of determining an adequate resistance threshold and failure criterion should be implemented for individual test methods in order to obtain accurate cyclic life results.

MAT2B - Low Loss Laminate Material Pad Cratering Resistance

Author: Michael Meilunas

Abstract: Greater demands on PCB signal speed and loss has led to the development of new laminate materials. Unfortunately the introduction of these materials often comes with a reduction in mechanical robustness as is evident by the increased occurrence of the pad cratering failure mechanism. This report compares the pad cratering performance of one common laminate material and two low-loss materials utilized in many HDI and high speed applications by using a four-point cyclic bend test method to stress the samples.

MAT4A - Component Level Testing of Thermal Interface Materials

Author: Harry Schoeller

Abstract: While chip size continues to decrease year after year, power dissipation continues to increase. Thermal interface materials (TIMs) are frequently used to increase the efficiency of heat transfer from the die to the thermal solution to maintain safe operating temperatures. However selection of a TIM can be problematic because supplier data is often unreliable, differing considerably from what is encountered out in the field. Additionally the standard for measuring thermal resistance, ASTM D-5470, is flawed because of unrealistic loading conditions and contact resistances. In an effort to provide more realistic thermal resistance measurements, a variable load component level test fixture was developed for measuring the thermal resistance of TIMs. The thermal resistances of 13 commercially available gap pads were measured at 10% and 30% compression. Additionally some of the more compliant gap pads were characterized at 50% or 60% compression. Thermal resistance measurements were compared to data published by the supplier. The microstructure of each gap pad is presented in conjunction with thermal resistance measurements to help explain thermal performance

MAT3A-Effect of PCB Surface Finish on Sn Grain Morphology and Thermal Fatigue Performance of Lead- Free Solder Joints

Author: Babak Arfaei, Martin Anselm, Francis Mutuku, Eric Cotts

Abstract:The continuing decrease in the size of components brings new reliability challenges as the microstructure of lead-free solder alloys is significantly affected by solder volume and composition. It is well known that the microstructure of solder joints greatly affects the reliability of electronic packages. Our previous results have shown that the undercooling and thus Sn grain morphology of solder joints are dependent on solder volume. Different Sn grain morphologies affect the reliability of solder joints in thermal cycling tests. For example, some smaller LGA joints were found to outperform larger BGA joints of the same footprint. Moreover, the presence of various surface finishes can further alter the solidification behavior, microstructure and thermomechanical performance of solder joints.In this work, different PCB surface finishes such as Cu-OSP, ENIG, ENEPIG, and HASL (commonly used in the microelectronic industry) and some recently developed surface finishes such as ENTEK-OM and Pallaguard were evaluated. The effects of varying surface finish on the microstructure of SAC305 lead-free LGAs and BGAs were investigated. Sn grain morphology was characterized by crossed polarizer light microscopy (PLM). The effect of variation in solder volume and surface finish on Sn grain morphology and lifetime was assessed.A clear correlation between PCB surface finish, microstructure and reliability was observed. LGA samples assembled on HASL surface finish showed the highest degree of interlaced joints; those samples outperformed joints reflowed on other surface finishes. LGA samples showed more interlaced Sn grain morphology than larger BGA samples. Use of Pallaguard surface finish resulted in very poor performance of both BGA and LGA components in ATC tests.

MAT6A - Reliability of Gap Pad Thermal Interface Materials

Author: Harry Schoeller

Abstract: In 2013 the AREA Consortium developed a variable loading component level thermal interface material (TIM) test fixture. This fixture was used to measure the thermal resistance of 13 commercially available gap pads as a function of compression. These results were presented along with characterization of the microstructure in the AREA Consortium report “Component Level Testing of Thermal Interface Materials” published in 2014. The long term thermal performance of TIMs is important from the reliability standpoint. As an extension of the initial study, a subset of gap pads were characterized after high temperature storage (HTS) at 125˚C for 1000hrs and after 1000 cycles of accelerated thermal cycling (ATC) -40˚C/125˚C. This work reports on thermal resistance measurements and stress relaxation behavior after reliability testing. Additionally, the physical condition of each gap pad was investigated after testing, to identify potential reliability concerns.

APD3A - Component Warpage- Issues with Measurement and Standardization

Author: Martin K. Anselm

Abstract:Component warpage is the root cause for many manufacturing defects encountered by Contract Manufactures (CMs) who develop processes for the assembly of advanced products. Current JEDEC JESD22-B112A [1] and JEITA ED-7306 [2] standards for package warpage at elevated temperature describe the measurement techniques and provide maximum warpage recommendation for FBGA and FLGA devices. Historically only the JEITA standard defines the maximum allowable elevated temperature warpage conditions for FBGAs and FLGAs. The limitation of these standards is that defining the component warpage as an absolute is not acceptable for many of the instances where Head in Pillow (HiP) failures are observed in production. For example, there are many devices that easily comply with the standards, as characterized utilizing the prescribed techniques, yet still produce HiP failures. This is observed even in situations where contamination is an unlikely cause. The intent of this paper is to describe the limitations in measurement and complexity of warpage related defects. Several case studies are used to highlight the limitations of current industry standards and to serve as a launching point for research topics into warpage induced defects.

MAT3A - TB2013 -55C to 125C ATC - Effects of PCB Surface Finish

Author: Michael Meilunas

Abstract: TB2013 is a multilayer printed circuit board acquired with multiple surface finishes. Several surface mount package types were soldered to TB2013 using lead-free processes and the samples were subjected to thermal cycle testing in order to compare the effects of the surface finish on solder joint reliability. Described in this report are the thermal cycle test results and failure analylsis for samples subjected to ˗55/125°C accelerated thermal cycling.

MAT7A - New Alloy Study: Effect of size, Composition and Surface Finish on Room Temperature Mechanical Response and Failure Mechanism

Authors: Shantanu Joshi, Babak Arfaei

Abstract: In electronic assemblies, there has been always a concern about reliability of the solder joint. The integrity of the intermetallic compounds formed during the reflow process, at the interface, is one of the critical determinants of joint reliability. Studies indicate that the brittle fracture of intermetallic compound (IMC) at the interface makes Pb-free solder joints more vulnerable to failure. Current research was conducted to study the mechanical strength of various size lead-free solder joints. The work reported here examines the shear strength of various lead-free alloys on standard PCB surface finishes such as Cu‑OSP and Electroless Nickel Immersion Gold (ENIG) and compares their performance against the standard eutectic SnPb alloy. Shearing of various Pb-free alloys in various sizes reflowed on suitable sized Solder Mask Defined (SMD) pads were studied in as-reflowed and after isothermal aging. Shear strength was evaluated by shear testing the joints using DAGE 4000 and DAGE 4000HS. The effect of isothermal aging was evaluated on shear strength and further on failure modes. The failure mode observed after low speed shear testing for all the solder alloys were ductile failure with the failure through the bulk solder. Bulk solder failure was observed for all the alloys in both as-reflowed as well as after 3 weeks of aging at 125°C. Various failure modes observed when samples subjected to high speed shear testing. For most of the Pb-free alloys, there appeared to be a transition to brittle failure mode after 500 hours of aging. The results of shear testing on SnPb alloy indicated that the failure mechanism was ductile and there was no indication of brittle failure even after isothermal aging at 125°C.

MAT8A- Conformal Coating Effect on ATC Reliability - SnPb

Author: Michael Meilunas

Abstract: Conformal coatings are applied to printed circuit board assemblies for many reasons but their effect on product lifetime is not well understood. This study looked at five conformal coating options whose application was primarily intended to shield BGA, LGA and QFN electrical connections (i.e., solder joints) from the surrounding environment. The materials included spray applied Arathane 5750, Humiseal 1A33 and vapor deposited Parylene C. Because Arathane 5750 and Humiseal 1A33 were incapable of providing complete environmental shielding when spray applied, these materials were also evaluated using pre-applied dams which were manually dispensed around select devices. Once assembled, the coated test vehicles and uncoated control samples were subjected to ˗40 to 125°C thermal cycling to stress the assemblies. Solder joint performance was monitored in-situ to determine if the coatings affected joint reliability. Failures were analyzed to correlate the failure locations and mechanisms to the conformal coat characteristics (thickness, location, depth of penetration, material properties, etc.).

MAT2B - Effects of Pad Location on Cratering

Authors: Y. Zeng, P. Kondos, M. Anselm, and P. Borgesen

Abstract: Pad cratering is increasingly seen as the dominant failure mode under various isothermal loading conditions and is even becoming more common in thermal cycling. Various factors can influence the pad performance, i.e. strength and fatigue resistance. These factors include resin type, loading conditions, environmental humidity, etc. The present report demonstrates a latent factor which influences pad performance, namely the pad location relative to the underlying glass weave. Pad cratering was investigated by strength and fatigue testing of individual pads in a DAGE 4000 Plus solder bump tester using the so-called “Hot Bump Pull” method. The exact location of each pad relative to the glass bundles was determined based on acoustic microscope images. Various techniques (2 sample t-test, ANOVA, Tukey’s HSD test etc.) were used to test the statistical significance of differences between regions which were predefined according to the fiber glass style. The strength of the pads was found to increase when the crack initiation location was closer to the woven glass. The fatigue resistance showed a similar trend and was more sensitive than the strength to the pad location relative to glass.

REL1A - Effect of Prestress on PCB Pad Cratering Using Spherical Bend Test Method

Authors: Gaurang Joshi, Michael Meilunas, Liang Xue

Abstract: The Spherical Bend test method was utilized to study the effect of a single pre-stress on a Test Vehicle designed and assembled at Universal. The plan was to utilize four testing conditions: drop testing, cyclic bend testing, accelerated thermal cycling, to compare the change in lifetime due to bending-induced pre-stress on the assemblies and compare the results to baseline samples. Electrical event detection was used to determine failures. Strain gage utilization in this experiment was governed by the specifications in IPC/JEDEC-9707. Test parameters for the accelerated life testing were decided after characterization of the test assembly. Failure analysis on the cyclically bend tested assemblies with the spherical bend test fixture indicated an unexpected failure location which was not intended to be a part of this study. Therefore, a new bend test method was developed in an attempt to overcome this issue.

Vapor Phase Rework of High I/O Components

Author: Harry Schoeller

Abstract: A new Vapor Phase (VP) desoldering fixture, ReSy, was evaluated for reworking large BGAs. A VP desoldering process was developed documenting the time and temperature necessary to desolder the component. The VP desoldering process was then compared to a “standard” desoldering process in terms of process times, temperatures, and reliability in drop testing after rework. While the overall board temperatures for the VP process were higher, the localized maximum temperature was significantly lower. The time above liquidus (TAL) require for the VP desoldering process was similar to the times needed for the standard desoldering processes. In terms of drop test reliability, those assemblies reworked with a standard process had a slightly greater N63.2 life compared to those desoldered with the ReSy fixture. Failure analysis revealed both assemblies failed within the solder joint at the component side IMC.

AREA Consortium Rework Process Manual - Version 2014

Update Submitted by: Harry Schoeller

Added to this version:

  • Rework of Fine Pitch Components:

    • Rework and Re-ball process for 0.3mm CSP

    • Reliability of Reworked assemblies in ATC and drop testing

  • Vapor Phase Rework:

    • Description of VP desoldering fixture

    • VP desoldering procedure

Effect of WLCSP Under-Ball Metallization and PCB Surface Finish on Thermal Cycle Reliability Performance

Author: Michael Meilunas

Abstract: Universal Instruments’ Advanced Process Laboratory was supplied with five wafer-level package designs for assembly, thermal cycling and failure analysis as part of the 2013 AREA Consortium reliability program. The five designs were similar in overall dimension, I/O count and pitch, but contained unique under-ball metallization and routing. The intent of the project was to evaluate 2nd level solder joint reliability for each design and this was accomplished by assembling the samples to our Test Board 2013 printed circuit board and subjecting the assemblies to ˗40C to 125C thermal cycling.

MAT7A - Dependence of Solder Joint Reliability on Solder Volume, Composition and Printed Circuit Board Surface Finish

Authors: Babak Arfaei , Francis Mutuku , Keith Sweatman , Ning-Cheng Lee , Eric Cotts , Richard Coyle

Abstract: Thermal fatigue and room temperature isothermal mechanical performance of various Pb-free and SnPb solder joints were examined. Various solder alloys doped with Ni (SN100C) and Mn (SAC105-Mn and SACM) were evaluated and compared to SAC105, SAC 205 SAC 305 and SAC 405 and eutectic SnPb alloys. Solder spheres ranging from 10 to 20 mils were reflowed on various printed circuit board (PCB) surface finishes such as copper organic solderability preservative (Cu-OSP) and electroless nickel immersion gold (ENIG). The mechanical behavior of these solder joints was evaluated in low speed and high speed shear tests, and also in shear fatigue test. The effect of isothermal aging was examined. Custom made ball grid array (BGA) packages with the same alloys and sizes were tested in accelerated thermal cycling (ATC) test. The results from room temperature mechanical tests were correlated to package level ATC results obtained for the thermal cycling profile of -40/125°C. The effect of solder volume and composition on the solidification temperature of each solder joint was carefully measured by differential scanning calorimeter (DSC). Precipitate sizes and distributions were analyzed using backscattered scanning electron microscopy (SEM). Sn grain morphology was characterized by polarized light microscopy (PLM) and electron backscatter diffraction (EBSD).

Investigation of the lifetimes of various solder joints in room temperature fatigue and accelerated thermal cycling tests showed distinct dependences of lifetime on solder composition. Distinct increases in lifetimes with increases in Ag content were observed. Results suggested the recrystallization and failure mechanism in Pb-free solder joints are strongly affected by Ag3Sn precipitates. Combination of Cu/ENIG surface finishes generally resulted in some improvement in thermal fatigue performances. Results also showed that solder volume can greatly affect the microstructure and performance of SAC solder joints in mechanical and ATC tests. Larger samples generally solidified at higher temperatures and revealed different Sn grain morphologies than smaller samples, which generally undercooled more. Addition of dopants generally reduced the undercooling, resulting in different solder joint microstructures. The effect of variation in solder composition and volume and PCB surface finish on solder joint microstructure and lifetime was carefully evaluated.

TB2013 Design Overview

Author: Michael Meilunas

Abstract: AREA Test Board 2013 (TB2013) is an 8-layer, 370HR based printed circuit board designed for use in multiple AREA Consortium projects. The following report describes the test board design features and provides brief descriptions of the components which can be assembled to the board